Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment, as examples. Semiconductor devices are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductive layers of material over a semiconductor substrate, and patterning the various material layers using lithography to form circuit components and elements thereon. The semiconductor industry continues to improve the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) by continual reductions in minimum feature size, which allow more components to be integrated into a given area. These smaller electronic components also require smaller packages that utilize less area than packages of the past, in some applications.
One type of smaller packaging for semiconductor devices that has been developed is wafer level packaging (WLPs), in which integrated circuit die are packaged in packages that typically include a redistribution layer (RDL) that is used to fan out wiring for contact pads of the integrated circuit die so that electrical contact can be made on a larger pitch than contact pads of the die. Another type of packaging for semiconductor devices is referred to as a bump on trace (BOT) package. Solder bumps are formed on dies of a semiconductor wafer, and the dies are singulated. Die or “flip chips” are attached or soldered to traces on the BOT packages using a solder reflow process.
Generally, a semiconductor die may be connected to other devices external to the semiconductor die through a type of packaging utilizing solder bumps. The solder bumps may be formed by initially forming a layer of undercontact metallization on the semiconductor die and then placing solder onto the undercontact metallization. After the solder has been placed, a reflow operation may be performed in order to shape the solder into the desired bump shape. The solder bump may then be placed into physical contact with the external device and another reflow operation may be performed in order to bond the solder bump with the external device. In such a fashion, a physical and electrical connection may be made between the semiconductor die and an external device, such as a printed circuit board, another semiconductor die, or the like.
However, the material that comprises the undercontact metallization is merely one more type of material placed onto a stack of many different materials, such as dielectric materials, metallization materials, etch stop materials, barrier layer materials, and other materials utilized in the formation of the semiconductor die. Each one of these different materials may have a unique coefficient of thermal expansion that is different from the other materials. This type of coefficient of thermal expansion mismatch can cause problems if the semiconductor die is subjected to elevated temperatures.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.